- Sonus faber
- Spiral Groove
- Wilson Audio
- Om Stylus
In designing the series 9 Decoding Computer system our objective was clear – to create the new standard. The 922 mono Decoding Computers and the 931 Digital Controller (series 9 Decoding Computer system) present a unique three box architecture of unmatched digital and analog technology. The 922 mono Decoding Computers provide Digital to Analog conversion and the 931 Digital Controller functions as a digital preamplifier. The series 9 Decoding Computer system is proof positive that Wadia means – best in digital audio reproduction.
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931 Digital Controller
The 931 Digital Controller acts as the central controller or “brain” for the series 9 Decoding Computer system. Although the 931 Digital Controller may look somewhat similar to an analog preamplifier, there are some very important differences. The 931 Digital Controller processes only digital signals and does not alter the signal in any way, unlike an analog preamplifier. The 931 Digital Controller routes data from its inputs to its outputs as determined by the user and will not impart a sonic signature in the manner of an analog preamplifier. The 931 Digital Controller also decodes current digital audio input signals and converts them to Wadia’s proprietary Dual Fiber Interface format. If the Audio/Video industry standardizes a new digital format, the Wadia 931 Digital Controller can be upgraded, while keeping the Dual Fiber Interface as its own system interconnection standard. This prevents the 922 Mono Decoding Computers from needing regular updates or upgrades to support potential new formats that become accepted standards in the future. In addition, the 931 Digital Controller acts as the user-interface for the series 9 Decoding Computer system, receiving commands from the remote control and front panel buttons, learning programmed configurations, and displaying status on the front panel display.
The 931 Digital Controller has six digital inputs capable of receiving and decoding 24-bit signals up to 96 kHz sample rate in AES/EBU or S/PDIF format. Special provisions have been made to allow the 931 Digital Controller to accept 24-bit 192kHz sample rate data when a standardized input is agreed upon. Additionally the 931 Digital Controller has been designed to decode DSD data for the SACD format. A proprietary DSD input board featuring a ST Glass Fiber Optic connection will be available with the forthcoming introduction of a series 9 Disc Transport. The 931 Digital Controller inputs support two established Wadia jitter-reduction technologies: RockLok and ClockLink. RockLok is Wadia’s proprietary circuit that uses cascaded Phase-Locked-Loops (PLL) to recover the clock signal from the incoming data. RockLok produces a low-jitter clock signal from any standard digital source and can be used with all sources that comply with industry standards. With ClockLink, the clock signal embedded in the incoming data stream is ignored in favor of a local crystal oscillator. This requires that the source component be synchronized to the 931 Digital Controller via a ClockLink output. Any of the inputs can be user-configured for either ClockLink or RockLok mode.
Field Programmable Gate Array (FPGA)
All inputs and outputs in the 931 Digital Controller are routed to a very large field-programmable gate array (FPGA) on the main control board. From the FPGA, the data can be directed to the Digital Signal Processor (DSP) chip, to any of the eight outputs, or to connectors for future circuitry. With 100 input and output lines and over 20,000 gates, this gate array provides tremendous flexibility for digital signal routing. The gate array also has the ability to perform operations on the data, including decoding or re-configuring the data for transmission in other formats. The capability of the FPGA is far greater than what is required to execute the routing and processing functions performed by the current software release of the Wadia 931 Digital Controller. In addition, the FPGA can easily be re-configured by changing the software contained on a socket-mounted EPROM to facilitate potential future upgrades, such as decoding new digital audio formats.
The digital audio data is routed via the FPGA to a powerful Motorola Digital Signal Processing (DSP) located on the main control board of the 931 Digital Controller. This DSP chip provides the flexibility to execute features that may be implemented in the future. For example, the DSP could provide custom digital filtering or crossovers for multi-amplified speaker systems and room correction. It can potentially decode compressed digital audio data such as MLP and mp3. This embedded DSP is another example of the forethought that makes the 931 Digital Controller well positioned for upgrading easily as new features are required.
The Wadia 931 Digital Controller features a new implementation of Wadia’s ClockLink jitter reduction technology in the form of multiple-mono ClockLink (further information regarding Wadia’s ClockLink system and the causes of jitter can be found at http://www.wadia.com/technology/clocklink/sld001.htm). As in previous versions, the function of ClockLink is to position a master oscillator as near as possible to the D>A converter chips to reduce transmission-induced jitter. In a stereo DAC unit, this can be accomplished by locating the clock oscillator adjacent and equidistant the to the DAC chips for each channel. All upstream transports are then synchronized to the DAC’s oscillator clock signal. In a synchronous system with multiple mono DAC units, such as the 931 Digital Controller with the 922 Mono Decoding Computers, the DAC clock must be located as near to all channels as possible. If the master oscillator were located in one of the 922 Mono Decoding Computers, then all other towers would need to be synchronized to it, making for uneven clocking between channels. The series 9 Decoding Computer system uses the Distributed ClockLink scheme pictured below. The 931 Digital Controller contains an ultra-stable Temperature Compensated Crystal Oscillator (TCXO) that provides the reference clock for the entire system. The clock is transmitted to the source components and 922 Mono Decoding Computers via dedicated ST optical glass fiber interconnects as part of the Wadia Dual Fiber Interface.
922 mono Decoding Computers
Each 922 Decoding Computer is comprised of four major stages: the Digital Input Section, the Digital to Analog Conversion Section, the Variable Level Output Stage, and the Power Supply system. Digital Input Section The Digital Input Section functions as a receiver of information from the 931 Digital Controller via the Dual Fiber Interface, performs the DigiMaster interpolation filtering and volume control, and sends the digital audio signal to the D>A section.
DigiMaster 1.4 Interpolation Filter
The Wadia 922 uses the latest generation of Wadia’s proprietary interpolating digital filtering system, first introduced in 1991. The DigiMaster 1.4 Waveform Algorithm has been optimized for a wide range of performance parameters. Incoming data samples are reconstructed with special emphasis placed on time and phase accuracy. In contrast, typical off-the-shelf digital filtering is optimized for flat frequency response and fails to recreate the subtle musical presence and details that are preserved only with accurate time-based algorithms. The DigiMaster 1.4 interpolator uses a 12th-order, curve fitting, spline interpolation algorithm to precisely reconstruct the original analog waveform. Using digital signal processing (DSP), a curve is fitted that conforms to the current sample plus future and prior samples calculated at 48 bit resolution and output at 24-bit precision. The DigiMaster 1.4 operates at the rate of 64-times re-sampling of 44.1 kHz, that is, 63 interpolated values are calculated for each original sample from the CD. Although the interpolated samples are calculated by DigiMaster 1.4 to 48-bit precision, the original data samples from the compact disc are not altered in any way. A conventional 8x oversampling filter provides interpolated samples resulting in an approximated waveform with discrete stair steps. The DigiMaster 1.4 algorithm, operating at 64x oversampling, provides dramatically improved resolution in the waveform. Hence, the DigiMaster 1.4 algorithm more precisely reconstructs the original waveform.
Digital to Analog Conversion Section
The 922 D>A section converts the digital audio data into an analog signal. As described above, the DigiMaster 1.4 algorithm produces digital audio data at a very high sampling rate. For example, using the standard CD format, the DigiMaster 1.4 algorithm calculates 63 interpolated values for each original sample. The output to the D>A section is 2.8224 million samples per second, each sample with 24-bit resolution. This number gains even greater significance when compared to the DSD (SACD) system, which decodes 1-bit data at this rate. The 922 D>A section utilizes eight Burr Brown PCM 1704 DAC chips to convert the positive and inverted halves of the signal with a theoretical resolution beyond 24-bits; four for the positive half of the signal, and four for the inverted half. The individual circuit blocks are described in greater detail below.
Isolated Digital Coupler Array
The first element in the D>A section is an array of Burr Brown ISO150 Isolated Digital Couplers. These devices are placed between each of the incoming digital signal lines and the DAC chips to provide complete electrical isolation of all signal and ground lines. This prevents any digital noise and ground currents from the digital circuitry from adversely affecting the performance of sensitive analog signals in the 922 D>A section. Some digital products use optically-coupled isolators to isolate the digital inputs. The ISO150 avoids problems commonly associated with optocouplers, as optically isolated couplers require high current pulses and allowance must be made for LED aging. Optical isolators can exhibit a 50% reduction in light output from their internal LED within one year. In a worst-case scenario, this degradation could cause a performance or reliability issue. Since the ISO150 uses no LEDs, aging is not a factor and reliability and lifespan are greatly increased. The ISO 150 devices used in the 922 Decoding Module utilize a tiny internal air gap that acts as a capacitor by transferring high frequency signals. These devices allow data up to 80 Mbits/sec to be transmitted, while still achieving a very high degree of DC and low frequency isolation. Although the air gap is small, each device can withstand peak voltages up to 2400 volts.
Time Shifted DAC Array
To handle the 2.8224Mhz, 24-bit data stream from the DigiMaster 1.4 interpolation filter, the 922 D>A section uses a total of eight each of the Burr-Brown PCM 1704 24-bit DAC chips per channel configured in a balanced, time-shifted array. The Time-Shifted DAC array increases the speed at which digital information is converted, as well as increasing system resolution. In most designs, digital-to-analog conversion rates are limited by the settling time of the DAC chips and their current-to-voltage (I/V) amplifiers. When the conversion rates exceed the typical 8-times at 44.1 kHz (or 352 kHz) rate, insufficient settling time between samples degrades sonic performance. Wadia’s patented time-shifted DAC array overcomes this problem by feeding data to the DAC pairs sequentially. As a result, each DAC only has to decode a fraction of the total samples, allowing ample settling time between successive data values. As mentioned above, the Time Shifted DAC array provides higher resolution, e.g., when the current output of each DAC in the array is summed, the resulting signal has higher resolution than would be possible using individual DAC chips due to a lower level of noise in relation to the audio signal. Each DAC puts out a LSB (Least Significant Bit, the bit with the smallest value or representing the smallest portion of audio data) signal, representing the smallest amplitude signal possible for that DAC. When the currents from each DAC are summed, the resulting summed output signal has an improvement in signal-to-noise ratio (SNR): the noise floor remains the same, yet the overall output has increased, yielding an improvement in the theoretical resolution. This improvement is measured by the square root of the number of devices that are employed. For example, using two DAC chips would increase SNR by the square root of two, which is 1.41. By employing four DAC chips, the SNR is improved by a factor of two (equivalent to 1 bit). By using a total of eight DAC chips, the Wadia 922 Decoding Module achieves a resolution that is 2.82 times greater than a single DAC could provide.